Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key Management

The use of physical unclonable functions (PUFs) linked to the manufacturing process of the electronic devices supporting applications that exchange critical data over the Internet has made these elements essential to guarantee the authenticity of said devices, as well as the confidentiality and inte...

ver descrição completa

Detalhes bibliográficos
Autores: Sánchez-Solano, Santiago, Rojas-Muñoz, Luis Felipe, Martínez-Rodríguez, Macarena Cristina, Brox, Piedad
Formato: artículo
Estado:Versión publicada
Fecha de publicación:2024
País:España
Recursos:Consejo Superior de Investigaciones Científicas (CSIC)
Repositorio:DIGITAL.CSIC. Repositorio Institucional del CSIC
OAI Identifier:oai:digital.csic.es:10261/367063
Acesso em linha:http://hdl.handle.net/10261/367063
Access Level:acceso abierto
Palavra-chave:Hardware security
Physical unclonable functions
True random number generators
Programmable devices
Intellectual property modules
Secure key management
id ES_a60248621ab6d2fd2d7ff7ad60ffb8a0
oai_identifier_str oai:digital.csic.es:10261/367063
network_acronym_str ES
network_name_str España
repository_id_str
spelling Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key ManagementSánchez-Solano, SantiagoRojas-Muñoz, Luis FelipeMartínez-Rodríguez, Macarena CristinaBrox, PiedadHardware securityPhysical unclonable functionsTrue random number generatorsProgrammable devicesIntellectual property modulesSecure key managementThe use of physical unclonable functions (PUFs) linked to the manufacturing process of the electronic devices supporting applications that exchange critical data over the Internet has made these elements essential to guarantee the authenticity of said devices, as well as the confidentiality and integrity of the information they process or transmit. This paper describes the development of a configurable PUF/TRNG module based on ring oscillators (ROs) that takes full advantage of the structure of modern programmable devices offered by Xilinx 7 Series families. The proposed architecture improves the hardware efficiency with two main objectives. On the one hand, we perform an exhaustive statistical characterization of the results derived from the exploitation of RO configurability. On the other hand, we undertake the development of a new version of the module that requires a smaller amount of resources while considerably increasing the number of output bits compared to other proposals previously reported in the literature. The design as a highly parameterized intellectual property (IP) module connectable through a standard interface to a soft- or hard-core general-purpose processor greatly facilitates its integration into embedded solutions while accelerating the validation and characterization of this element on the same electronic device that implements it. The studies carried out reveal adequate values of reliability, uniqueness, and unpredictability when the module acts as a PUF, as well as acceptable levels of randomness and entropy when it acts as a true random number generator (TRNG). They also illustrate the ability to obfuscate and recover identifiers or cryptographic keys of up to 4096 bits using an implementation of the PUF/TRNG module that requires only an array of 4×4 configurable logic blocks (CLBs) to accommodate the RO bank.This research was supported in part by the SPIRS Project with Grant Agreement No. 952622 under the EU H2020 research and innovation programme and the ARES Project PID2020-116664RB-100 funded by MCIN/AEI/10.13039/501100011033 and the EU NextGeneration EU/PRTR.Peer reviewedMultidisciplinary Digital Publishing InstituteEuropean CommissionMinisterio de Ciencia, Innovación y Universidades (España)Agencia Estatal de Investigación (España)Consejo Superior de Investigaciones Científicas [https://ror.org/02gfc7t72]2024202420242024info:eu-repo/semantics/articlehttp://purl.org/coar/resource_type/c_6501Publisher's versioninfo:eu-repo/semantics/publishedVersionapplication/pdfhttp://hdl.handle.net/10261/367063reponame:DIGITAL.CSIC. Repositorio Institucional del CSICinstname:Consejo Superior de Investigaciones Científicas (CSIC)Inglés#PLACEHOLDER_PARENT_METADATA_VALUE##PLACEHOLDER_PARENT_METADATA_VALUE#info:eu-repo/grantAgreement/EC/H2020/952622info:eu-repo/grantAgreement/AEI/Plan Estatal de Investigación Científica y Técnica y de Innovación 2017-2020/PID2020-116664RB-I00https://doi.org/10.3390/s24175674Síinfo:eu-repo/semantics/openAccessoai:digital.csic.es:10261/3670632026-05-22T06:33:51Z
dc.title.none.fl_str_mv Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key Management
title Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key Management
spellingShingle Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key Management
Sánchez-Solano, Santiago
Hardware security
Physical unclonable functions
True random number generators
Programmable devices
Intellectual property modules
Secure key management
title_short Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key Management
title_full Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key Management
title_fullStr Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key Management
title_full_unstemmed Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key Management
title_sort Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key Management
dc.creator.none.fl_str_mv Sánchez-Solano, Santiago
Rojas-Muñoz, Luis Felipe
Martínez-Rodríguez, Macarena Cristina
Brox, Piedad
author Sánchez-Solano, Santiago
author_facet Sánchez-Solano, Santiago
Rojas-Muñoz, Luis Felipe
Martínez-Rodríguez, Macarena Cristina
Brox, Piedad
author_role author
author2 Rojas-Muñoz, Luis Felipe
Martínez-Rodríguez, Macarena Cristina
Brox, Piedad
author2_role author
author
author
dc.contributor.none.fl_str_mv European Commission
Ministerio de Ciencia, Innovación y Universidades (España)
Agencia Estatal de Investigación (España)
Consejo Superior de Investigaciones Científicas [https://ror.org/02gfc7t72]
dc.subject.none.fl_str_mv Hardware security
Physical unclonable functions
True random number generators
Programmable devices
Intellectual property modules
Secure key management
topic Hardware security
Physical unclonable functions
True random number generators
Programmable devices
Intellectual property modules
Secure key management
description The use of physical unclonable functions (PUFs) linked to the manufacturing process of the electronic devices supporting applications that exchange critical data over the Internet has made these elements essential to guarantee the authenticity of said devices, as well as the confidentiality and integrity of the information they process or transmit. This paper describes the development of a configurable PUF/TRNG module based on ring oscillators (ROs) that takes full advantage of the structure of modern programmable devices offered by Xilinx 7 Series families. The proposed architecture improves the hardware efficiency with two main objectives. On the one hand, we perform an exhaustive statistical characterization of the results derived from the exploitation of RO configurability. On the other hand, we undertake the development of a new version of the module that requires a smaller amount of resources while considerably increasing the number of output bits compared to other proposals previously reported in the literature. The design as a highly parameterized intellectual property (IP) module connectable through a standard interface to a soft- or hard-core general-purpose processor greatly facilitates its integration into embedded solutions while accelerating the validation and characterization of this element on the same electronic device that implements it. The studies carried out reveal adequate values of reliability, uniqueness, and unpredictability when the module acts as a PUF, as well as acceptable levels of randomness and entropy when it acts as a true random number generator (TRNG). They also illustrate the ability to obfuscate and recover identifiers or cryptographic keys of up to 4096 bits using an implementation of the PUF/TRNG module that requires only an array of 4×4 configurable logic blocks (CLBs) to accommodate the RO bank.
publishDate 2024
dc.date.none.fl_str_mv 2024
2024
2024
2024
dc.type.none.fl_str_mv info:eu-repo/semantics/article
http://purl.org/coar/resource_type/c_6501
Publisher's version
info:eu-repo/semantics/publishedVersion
format article
status_str publishedVersion
dc.identifier.none.fl_str_mv http://hdl.handle.net/10261/367063
url http://hdl.handle.net/10261/367063
dc.language.none.fl_str_mv Inglés
language_invalid_str_mv Inglés
dc.relation.none.fl_str_mv #PLACEHOLDER_PARENT_METADATA_VALUE#
#PLACEHOLDER_PARENT_METADATA_VALUE#
info:eu-repo/grantAgreement/EC/H2020/952622
info:eu-repo/grantAgreement/AEI/Plan Estatal de Investigación Científica y Técnica y de Innovación 2017-2020/PID2020-116664RB-I00
https://doi.org/10.3390/s24175674
Sí
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv Multidisciplinary Digital Publishing Institute
publisher.none.fl_str_mv Multidisciplinary Digital Publishing Institute
dc.source.none.fl_str_mv reponame:DIGITAL.CSIC. Repositorio Institucional del CSIC
instname:Consejo Superior de Investigaciones Científicas (CSIC)
instname_str Consejo Superior de Investigaciones Científicas (CSIC)
reponame_str DIGITAL.CSIC. Repositorio Institucional del CSIC
collection DIGITAL.CSIC. Repositorio Institucional del CSIC
repository.name.fl_str_mv
repository.mail.fl_str_mv
_version_ 1869415662631256064
score 15,811543

Registos relacionados