Cita APA

Núñez Martínez, J., & Avedillo de Juan, M. J. (2016). Comparative Analysis of Projected Tunnel and CMOS Transistors for Different Logic Application Areas.

Citación estilo Chicago

Núñez Martínez, Juan, y María José Avedillo de Juan. Comparative Analysis of Projected Tunnel and CMOS Transistors for Different Logic Application Areas. 2016.

Cita MLA

Núñez Martínez, Juan, y María José Avedillo de Juan. Comparative Analysis of Projected Tunnel and CMOS Transistors for Different Logic Application Areas. 2016.