CPU accounting in CMP processors
Chip-MultiProcessors (CMP) introduce complexities when accounting CPU utilization to processes because the progress done by a process during an interval of time highly depends on the activity of the other processes it is co-scheduled with. We propose a new hardware accounting mechanism to improve th...
| Autores: | , , , , , |
|---|---|
| Tipo de documento: | artigo |
| Data de publicação: | 2009 |
| País: | España |
| Recursos: | Universitat Politècnica de Catalunya (UPC) |
| Repositório: | UPCommons. Portal del coneixement obert de la UPC |
| Idioma: | inglês |
| OAI Identifier: | oai:upcommons.upc.edu:2117/106188 |
| Acesso em linha: | https://hdl.handle.net/2117/106188 https://dx.doi.org/10.1109/L-CA.2009.3 |
| Access Level: | Acceso aberto |
| Palavra-chave: | Multiprocessors Microprocessors Resource allocation Microprocessor chips Multiprocessing systems Processor scheduling Multiprocessadors Microprocessadors Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
| Resumo: | Chip-MultiProcessors (CMP) introduce complexities when accounting CPU utilization to processes because the progress done by a process during an interval of time highly depends on the activity of the other processes it is co-scheduled with. We propose a new hardware accounting mechanism to improve the accuracy when measuring the CPU utilization in CMPs and compare it with the previous accounting mechanisms. Our results show that currently known mechanisms could lead to a 12% average error when it comes to CPU utilization accounting. Our proposal reduces this error to less than 1% in a modeled 4-core processor system. |
|---|