Automatic synthesis of fuzzy logic controlers
This paper describes a design environment for the hardware realizations of fuzzy controllers which includes a set of CAD tools to ease the description, verification and synthesis of this kind of systems. Special emphasis is focused on the use of a standard hardware description language (VHDL) and co...
| Authors: | , , , , |
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| Format: | article |
| Publication Date: | 1996 |
| Country: | España |
| Institution: | Universitat Politècnica de Catalunya (UPC) |
| Repository: | UPCommons. Portal del coneixement obert de la UPC |
| Language: | English |
| OAI Identifier: | oai:upcommons.upc.edu:2099/3480 |
| Online Access: | https://hdl.handle.net/2099/3480 |
| Access Level: | Open access |
| Keyword: | VHDL CAD tools Fuzzy programming Sistemes de control Classificació AMS::93 Systems Theory Control::93C Control systems, guided systems |
| Summary: | This paper describes a design environment for the hardware realizations of fuzzy controllers which includes a set of CAD tools to ease the description, verification and synthesis of this kind of systems. Special emphasis is focused on the use of a standard hardware description language (VHDL) and compatibility with other integrated circuits design tools. |
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