Design of an on-chip hybrid DC/DC converter
This paper presents the design of a hybrid on-chip VLSI DC/DC converter for low to medium integrated circuit power consumption that combines a switching and a linear regulator in parallel. The main goal is to take the best of both approaches, obtaining good power efficiency as in switching DC/DC con...
| Autores: | , |
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| Tipo de recurso: | artículo |
| Fecha de publicación: | 2015 |
| País: | España |
| Institución: | Universitat Politècnica de Catalunya (UPC) |
| Repositorio: | UPCommons. Portal del coneixement obert de la UPC |
| Idioma: | inglés |
| OAI Identifier: | oai:upcommons.upc.edu:2117/80799 |
| Acceso en línea: | https://hdl.handle.net/2117/80799 https://dx.doi.org/10.1109/TLA.2015.7273764 |
| Access Level: | acceso abierto |
| Palabra clave: | DC-to-DC converters DC/DC converter hybrid regulator CMOS VLSI design power electronics first-generation current conveyor (CCI) Convertidors continu-continu Àrees temàtiques de la UPC::Enginyeria electrònica |
| Sumario: | This paper presents the design of a hybrid on-chip VLSI DC/DC converter for low to medium integrated circuit power consumption that combines a switching and a linear regulator in parallel. The main goal is to take the best of both approaches, obtaining good power efficiency as in switching DC/DC converters, with small voltage output ripple as in linear converters. While the switching regulator is used to drive most of the load current, the linear regulator supplies the required current to filter out the steady state ripple due to inductor switching without the need of a filtering output capacitor. In addition, the second regulator supplies the required current when the load changes abruptly and the inductor current is momentarily insufficient. The design has been tested with simulations using a standard 180-nm CMOS technology showing good performance. |
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