A modular simulation tool of an orchestrator for allocating virtual resources in SDN

Software-Defined Networking (SDN) and Network Functions Virtualization (NFV) are technologies for enabling innovative network architectures. Nevertheless, a fundamental problem in instantiation of Virtual Networks (VNs), performed by NFV, is an optimal allocation of resources offered by one or more...

Descripción completa

Detalles Bibliográficos
Autores: García García, Aurelio Javier|||0000-0001-5893-7208, Cervelló Pastor, Cristina|||0000-0002-8056-0774, Jiménez Agudelo, Yury Andrea
Tipo de recurso: artículo
Fecha de publicación:2014
País:España
Institución:Universitat Politècnica de Catalunya (UPC)
Repositorio:UPCommons. Portal del coneixement obert de la UPC
Idioma:inglés
OAI Identifier:oai:upcommons.upc.edu:2117/26755
Acceso en línea:https://hdl.handle.net/2117/26755
https://dx.doi.org/10.7763/IJMO.2014.V4.352
Access Level:acceso abierto
Palabra clave:Software-defined networking (Computer network technology)
network functions virtualization
network modeling
optimization
software-defined networking
Xarxes definides per programari (Tecnologia de xarxes d'ordinadors)
Àrees temàtiques de la UPC::Enginyeria de la telecomunicació::Telemàtica i xarxes d'ordinadors
Descripción
Sumario:Software-Defined Networking (SDN) and Network Functions Virtualization (NFV) are technologies for enabling innovative network architectures. Nevertheless, a fundamental problem in instantiation of Virtual Networks (VNs), performed by NFV, is an optimal allocation of resources offered by one or more SDN domain networks. The process of instantiation of VNs is performed in several phases, including splitting and mapping algorithms. For each one of these phases, researchers have developed algorithms, being possible to obtain different results combining them. This paper introduces a modular and flexible graphical discrete event simulation tool for solving the complete virtual resource allocation in SDN domain networks problem. A Java-based tool has been developed to integrate existing and future algorithms related to each phase of the process. The simulator is a test-bed in which researchers can select the appropriate algorithm in each phase and display the results in a graphical form, while obtaining a performance evaluation of the selected and proposed algorithms.