360 nW gate-driven ultra-low voltage CMOS linear transconductor with 1 MHz bandwidth and wide input range
A low voltage linear transconductor is introduced. The circuit is a pseudo differential architecture that operates with ±0.2V supplies and uses 900nA total biasing current. It employs a floating battery technique to achieve low voltage operation. The transconductor has a 1MHz bandwidth. It exhibits...
| Autores: | , , , |
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| Tipo de recurso: | artículo |
| Estado: | Versión aceptada para publicación |
| Fecha de publicación: | 2020 |
| País: | España |
| Institución: | Universidad Pública de Navarra |
| Repositorio: | Academica-e. Repositorio Institucional de la Universidad Pública de Navarra |
| OAI Identifier: | oai:academica-e.unavarra.es:2454/39601 |
| Acceso en línea: | https://hdl.handle.net/2454/39601 |
| Access Level: | acceso abierto |
| Palabra clave: | Analog integrated circuits Low-power Low voltage Linear operational transconductance amplifier |
| Sumario: | A low voltage linear transconductor is introduced. The circuit is a pseudo differential architecture that operates with ±0.2V supplies and uses 900nA total biasing current. It employs a floating battery technique to achieve low voltage operation. The transconductor has a 1MHz bandwidth. It exhibits a SNR = 72dB, SFDR = 42dB and THD = 0.83% for a 100mVpp 10kHz sinusoidal input signal. Moreover, stability is not affected by the capacitance of the signal source. The circuit has been validated with a prototype chip fabricated in a 130nm CMOS technology. |
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