Last Bank: dealing with address reuse in non-uniform cache architecture for CMPs
In response to the constant increase in wire delays, Non-Uniform Cache Architecture (NUCA) has been introduced as an effective memory model for dealing with growing memory latencies. This architecture divides a large memory cache into smaller banks that can be accessed independently. Banks close to...
| Autores: | , , |
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| Formato: | informe técnico |
| Fecha de publicación: | 2009 |
| País: | España |
| Recursos: | Universitat Politècnica de Catalunya (UPC) |
| Repositorio: | UPCommons. Portal del coneixement obert de la UPC |
| Idioma: | inglés |
| OAI Identifier: | oai:upcommons.upc.edu:2117/8400 |
| Acesso em linha: | https://hdl.handle.net/2117/8400 |
| Access Level: | acceso abierto |
| Palavra-chave: | Computer storage devices Computer architecture NUCA Memòria jeràrquica (Informàtica) Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors |
| Resumo: | In response to the constant increase in wire delays, Non-Uniform Cache Architecture (NUCA) has been introduced as an effective memory model for dealing with growing memory latencies. This architecture divides a large memory cache into smaller banks that can be accessed independently. Banks close to the cache controller therefore have a faster response time than banks located farther away from it. In this paper, we propose and analyse the insertion of an additional bank into the NUCA cache. This is called Last Bank. This extra bank deals with data blocks that have been evicted from the other banks in the NUCA cache. Furthermore, we analyse the behaviour of the cache line replacements done in the NUCA cache and propose two optimisations of Last Bank that provide significant performance benefits without incurring unaffordable implementation costs. |
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