Transforming classic discrete event system specification models to specification and description language
Discrete Event System Specification (DEVS) is one of the main widely used formal languages to represent simulation models, while Specification and Description Language (SDL) is a graphical ITU-T standard language, commonly used in telecommunication and engineering areas. In this paper, we present an...
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| Tipo de recurso: | artículo |
| Fecha de publicación: | 2015 |
| País: | España |
| Institución: | Universitat Politècnica de Catalunya (UPC) |
| Repositorio: | UPCommons. Portal del coneixement obert de la UPC |
| Idioma: | inglés |
| OAI Identifier: | oai:upcommons.upc.edu:2117/80899 |
| Acceso en línea: | https://hdl.handle.net/2117/80899 https://dx.doi.org/10.1177/0037549715571623 |
| Access Level: | acceso abierto |
| Palabra clave: | Artificial intelligence Discrete Event System Specification Specification and Description Language simulation formal language Intel·ligència artificial Classificació AMS::68 Computer science::68T Artificial intelligence Àrees temàtiques de la UPC::Matemàtiques i estadística::Investigació operativa::Simulació |
| Sumario: | Discrete Event System Specification (DEVS) is one of the main widely used formal languages to represent simulation models, while Specification and Description Language (SDL) is a graphical ITU-T standard language, commonly used in telecommunication and engineering areas. In this paper, we present an algorithm, and a simulation infrastructure that implements this algorithm, to transform a simulation model represented using the DEVS formalism to the SDL standard language. The algorithm can be viewed as a mechanism to represent graphically DEVS models. In addition, because of the transformation, one can use SDL tools in order to implement DEVS models. To implement the algorithm, we propose an Extensible Markup Language representation for the DEVS and SDL models. For practical application of the algorithm, it is implemented in a simulation infrastructure named the Specification and Description Language Parallel Simulator that allows defining the models with both formalisms. |
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