HRM: merging hardware event monitors for improved timing analysis of complex MPSoCs

The Performance Monitoring Unit (PMU) in MPSoCs is at the heart of the latest measurement-based timing analysis techniques in Critical Embedded Systems. In particular, hardware event monitors (HEMs) in the PMU are used as building blocks in the process of budgeting and verifying software timing by t...

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Detalles Bibliográficos
Autores: Vilardell Moreno, Sergi, Serra Mochales, Isabel, Santalla, Roberto, Mezzetti, Enrico|||0000-0002-1886-2931, Abella Ferrer, Jaume|||0000-0001-7951-4028, Cazorla Almeida, Francisco Javier
Tipo de recurso: artículo
Fecha de publicación:2020
País:España
Institución:Universitat Politècnica de Catalunya (UPC)
Repositorio:UPCommons. Portal del coneixement obert de la UPC
Idioma:español
OAI Identifier:oai:upcommons.upc.edu:2117/327538
Acceso en línea:https://hdl.handle.net/2117/327538
https://dx.doi.org/10.1109/TCAD.2020.3013051
Access Level:acceso abierto
Palabra clave:High performance computing
Embedded computer systems
Càlcul intensiu (Informàtica)
Sistemes incrustats (Informàtica)
Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles
Descripción
Sumario:The Performance Monitoring Unit (PMU) in MPSoCs is at the heart of the latest measurement-based timing analysis techniques in Critical Embedded Systems. In particular, hardware event monitors (HEMs) in the PMU are used as building blocks in the process of budgeting and verifying software timing by tracking and controlling access counts to shared resources. While the number of HEMs in current MPSoCs reaches hundreds, they are read via Performance Monitoring Counters whose number is usually limited to 4-8, thus requiring multiple runs of each experiment in order to collect all desired HEMs. Despite the effort of engineers in controlling the execution conditions of each experiment, the complexity of current MPSoCs makes it arguably impossible to completely remove the noise affecting each run. As a result, HEMs read in different runs are subject to different variability, and hence, those HEMs captured in different runs cannot be ‘blindly’ merged. In this work, we focus on the NXP T2080 platform where we observed up to 59% variability across different runs of the same experiment for some relevant HEMs (e.g. processor cycles). We develop a HEM reading and merging (HRM) approach to join reliably HEMs across different runs as a fundamental element of any measurement-based timing budgeting and verification technique. Our method builds on order statistics and the selection of an anchor HEM read in all runs to derive the most plausible combination of HEM readings that keep the distribution of each HEM and their relationship with the anchor HEM intact.