Resolution analysis of switching converter models for hardware-in-the-loop

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Detalles Bibliográficos
Autores: Goñi, Óscar, Sánchez González, Alberto, Todorovich, Elías, Castro Martín, Ángel de
Tipo de recurso: artículo
Fecha de publicación:2014
País:España
Institución:Universidad Autónoma de Madrid
Repositorio:Biblos-e Archivo. Repositorio Institucional de la UAM
Idioma:inglés
OAI Identifier:oai:repositorio.uam.es:10486/665511
Acceso en línea:http://hdl.handle.net/10486/665511
https://dx.doi.org/10.1109/TII.2013.2294327
Access Level:acceso abierto
Palabra clave:Resolution analysis
Hardware-in-the-loop
Functional verification
Digital control
Switching converters
Field programmable gate arrays
Telecomunicaciones
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spelling Resolution analysis of switching converter models for hardware-in-the-loopGoñi, ÓscarSánchez González, AlbertoTodorovich, ElíasCastro Martín, Ángel deResolution analysisHardware-in-the-loopFunctional verificationDigital controlSwitching convertersField programmable gate arraysTelecomunicacionesPersonal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. O. Goñi, A. Sánchez, E. Todorovich, Á. de Castro, "Resolution Analysis of Switching Converter Models for Hardware-in-the-Loop", IEEE Transactions on Industrial Informatics, vol. 10, no.2, pp.1162 - 1170, May, 2014This work proposes two methods to determine the resolution of state variables in models of switching-mode power converters. The target models are intended for hardware-in-the-loop, i.e., closed-loop emulation using a model of the power converter implemented in digital hardware with the controller in its final implementation. The focus here is on the resolution of fixed-point models, although the results can also be applied to the significand resolution in floating-point representation. The first method is based on the simulation, provides the designer with the optimum resolution values, and guarantees that using the resolution, the converter will behave as it was specified. The second method is fast but conservative, intended for applications without hard constraints of area and speed. Despite the simplicity of the second method, its results, although slightly overestimated, have been demonstrated to be correct by the results of the first method. A boost converter for the power factor correction is used as an application example. As the converter model is intended for field-programmable gate array implementation, its area and maximum clock frequency are also analyzed. In this application example, the results show that the area grows linearly with the number of bits of each state variable, and the clock frequency is dominated by the width of one of the variables.This work was partially supported by the Agencia Nacional de Promoción Científica y Tecnológica, Argentina, through Project PICT 2009 - 0041.IEEEDepartamento de Tecnología Electrónica y de las ComunicacionesEscuela Politécnica SuperiorLaboratorio de Tecnología Hombre-Computador (ING EPS-010)20142014-05-01research articlehttp://purl.org/coar/resource_type/c_2df8fbb1AMhttp://purl.org/coar/version/c_ab4af688f83e57aainfo:eu-repo/semantics/articleapplication/pdfhttp://hdl.handle.net/10486/665511https://dx.doi.org/10.1109/TII.2013.2294327reponame:Biblos-e Archivo. Repositorio Institucional de la UAMinstname:Universidad Autónoma de MadridInglésengopen accesshttp://purl.org/coar/access_right/c_abf2info:eu-repo/semantics/openAccessoai:repositorio.uam.es:10486/6655112026-06-23T12:46:27Z
dc.title.none.fl_str_mv Resolution analysis of switching converter models for hardware-in-the-loop
title Resolution analysis of switching converter models for hardware-in-the-loop
spellingShingle Resolution analysis of switching converter models for hardware-in-the-loop
Goñi, Óscar
Resolution analysis
Hardware-in-the-loop
Functional verification
Digital control
Switching converters
Field programmable gate arrays
Telecomunicaciones
title_short Resolution analysis of switching converter models for hardware-in-the-loop
title_full Resolution analysis of switching converter models for hardware-in-the-loop
title_fullStr Resolution analysis of switching converter models for hardware-in-the-loop
title_full_unstemmed Resolution analysis of switching converter models for hardware-in-the-loop
title_sort Resolution analysis of switching converter models for hardware-in-the-loop
dc.creator.none.fl_str_mv Goñi, Óscar
Sánchez González, Alberto
Todorovich, Elías
Castro Martín, Ángel de
author Goñi, Óscar
author_facet Goñi, Óscar
Sánchez González, Alberto
Todorovich, Elías
Castro Martín, Ángel de
author_role author
author2 Sánchez González, Alberto
Todorovich, Elías
Castro Martín, Ángel de
author2_role author
author
author
dc.contributor.none.fl_str_mv Departamento de Tecnología Electrónica y de las Comunicaciones
Escuela Politécnica Superior
Laboratorio de Tecnología Hombre-Computador (ING EPS-010)
dc.subject.none.fl_str_mv Resolution analysis
Hardware-in-the-loop
Functional verification
Digital control
Switching converters
Field programmable gate arrays
Telecomunicaciones
topic Resolution analysis
Hardware-in-the-loop
Functional verification
Digital control
Switching converters
Field programmable gate arrays
Telecomunicaciones
description Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. O. Goñi, A. Sánchez, E. Todorovich, Á. de Castro, "Resolution Analysis of Switching Converter Models for Hardware-in-the-Loop", IEEE Transactions on Industrial Informatics, vol. 10, no.2, pp.1162 - 1170, May, 2014
publishDate 2014
dc.date.none.fl_str_mv 2014
2014-05-01
dc.type.none.fl_str_mv research article
http://purl.org/coar/resource_type/c_2df8fbb1
AM
http://purl.org/coar/version/c_ab4af688f83e57aa
dc.type.openaire.fl_str_mv info:eu-repo/semantics/article
format article
dc.identifier.none.fl_str_mv http://hdl.handle.net/10486/665511
https://dx.doi.org/10.1109/TII.2013.2294327
url http://hdl.handle.net/10486/665511
https://dx.doi.org/10.1109/TII.2013.2294327
dc.language.none.fl_str_mv Inglés
eng
language_invalid_str_mv Inglés
language eng
dc.rights.none.fl_str_mv open access
http://purl.org/coar/access_right/c_abf2
dc.rights.openaire.fl_str_mv info:eu-repo/semantics/openAccess
rights_invalid_str_mv open access
http://purl.org/coar/access_right/c_abf2
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv IEEE
publisher.none.fl_str_mv IEEE
dc.source.none.fl_str_mv reponame:Biblos-e Archivo. Repositorio Institucional de la UAM
instname:Universidad Autónoma de Madrid
instname_str Universidad Autónoma de Madrid
reponame_str Biblos-e Archivo. Repositorio Institucional de la UAM
collection Biblos-e Archivo. Repositorio Institucional de la UAM
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