Profiling quantum circuits for their efficient execution on single- and multi-core architectures

Application-specific quantum computers offer the most efficient means to tackle problems intractable by classical computers. Realizing these architectures necessitates a deep understanding of quantum circuit properties and their relationship to execution outcomes on quantum devices. Our study aims t...

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Autores: Bandic, Medina, le Henaff, Pablo, Ovide González, Anabel, Escofet i Majoral, Pau, Ben Rached, Sahar, Rodrigo Muñoz, Santiago, van Someren, Hans, Abadal Cavallé, Sergi|||0000-0003-0941-0260, Alarcón Cot, Eduardo José|||0000-0001-7663-7153, García Almudever, Carmen, Feld, Sebastian
Tipo de recurso: artículo
Fecha de publicación:2025
País:España
Institución:Universitat Politècnica de Catalunya (UPC)
Repositorio:UPCommons. Portal del coneixement obert de la UPC
Idioma:inglés
OAI Identifier:oai:upcommons.upc.edu:2117/431867
Acceso en línea:https://hdl.handle.net/2117/431867
https://dx.doi.org/10.1088/2058-9565/ada180
Access Level:acceso abierto
Palabra clave:Quantum circuit mapping
Multi-core quantum computers
Modular architectures
Quantum communication
Interaction graphs
Quantum benchmarks
Gate-dependency graphs
Àrees temàtiques de la UPC::Informàtica
Àrees temàtiques de la UPC::Enginyeria electrònica
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spelling Profiling quantum circuits for their efficient execution on single- and multi-core architecturesBandic, Medinale Henaff, PabloOvide González, AnabelEscofet i Majoral, PauBen Rached, SaharRodrigo Muñoz, Santiagovan Someren, HansAbadal Cavallé, Sergi|||0000-0003-0941-0260Alarcón Cot, Eduardo José|||0000-0001-7663-7153García Almudever, CarmenFeld, SebastianQuantum circuit mappingMulti-core quantum computersModular architecturesQuantum communicationInteraction graphsQuantum benchmarksGate-dependency graphsÀrees temàtiques de la UPC::InformàticaÀrees temàtiques de la UPC::Enginyeria electrònicaApplication-specific quantum computers offer the most efficient means to tackle problems intractable by classical computers. Realizing these architectures necessitates a deep understanding of quantum circuit properties and their relationship to execution outcomes on quantum devices. Our study aims to perform for the first time a rigorous examination of quantum circuits by introducing graph theory-based metrics extracted from their qubit interaction graph and gate dependency graph (GDG) alongside conventional parameters describing the circuit itself. This methodology facilitates a comprehensive analysis and clustering of quantum circuits. Furthermore, it uncovers a connection between parameters rooted in both qubit interaction and GDGs, and the performance metrics for quantum circuit mapping, across a range of established quantum device and mapping configurations. Among the various device configurations, we particularly emphasize modular (i.e. multi-core) quantum computing architectures due to their high potential as a viable solution for quantum device scalability. This thorough analysis will help us to: i) identify key attributes of quantum circuits that affect the quantum circuit mapping performance metrics; ii) predict the performance on a specific chip for similar circuit structures; iii) determine preferable combinations of mapping techniques and hardware setups for specific circuits; and iv) define representative benchmark sets by clustering similarly structured circuits.Institute of Physics (IOP)20252025-01-0120252025-06-17journal articlehttp://purl.org/coar/resource_type/c_6501VoRhttp://purl.org/coar/version/c_970fb48d4fbd8a85info:eu-repo/semantics/articleapplication/pdfhttps://hdl.handle.net/2117/431867https://dx.doi.org/10.1088/2058-9565/ada180reponame:UPCommons. Portal del coneixement obert de la UPCinstname:Universitat Politècnica de Catalunya (UPC)Inglésengopen accesshttp://purl.org/coar/access_right/c_abf2Attribution 4.0 Internationalhttp://creativecommons.org/licenses/by/4.0/info:eu-repo/semantics/openAccessoai:upcommons.upc.edu:2117/4318672026-05-27T15:37:01Z
dc.title.none.fl_str_mv Profiling quantum circuits for their efficient execution on single- and multi-core architectures
title Profiling quantum circuits for their efficient execution on single- and multi-core architectures
spellingShingle Profiling quantum circuits for their efficient execution on single- and multi-core architectures
Bandic, Medina
Quantum circuit mapping
Multi-core quantum computers
Modular architectures
Quantum communication
Interaction graphs
Quantum benchmarks
Gate-dependency graphs
Àrees temàtiques de la UPC::Informàtica
Àrees temàtiques de la UPC::Enginyeria electrònica
title_short Profiling quantum circuits for their efficient execution on single- and multi-core architectures
title_full Profiling quantum circuits for their efficient execution on single- and multi-core architectures
title_fullStr Profiling quantum circuits for their efficient execution on single- and multi-core architectures
title_full_unstemmed Profiling quantum circuits for their efficient execution on single- and multi-core architectures
title_sort Profiling quantum circuits for their efficient execution on single- and multi-core architectures
dc.creator.none.fl_str_mv Bandic, Medina
le Henaff, Pablo
Ovide González, Anabel
Escofet i Majoral, Pau
Ben Rached, Sahar
Rodrigo Muñoz, Santiago
van Someren, Hans
Abadal Cavallé, Sergi|||0000-0003-0941-0260
Alarcón Cot, Eduardo José|||0000-0001-7663-7153
García Almudever, Carmen
Feld, Sebastian
author Bandic, Medina
author_facet Bandic, Medina
le Henaff, Pablo
Ovide González, Anabel
Escofet i Majoral, Pau
Ben Rached, Sahar
Rodrigo Muñoz, Santiago
van Someren, Hans
Abadal Cavallé, Sergi|||0000-0003-0941-0260
Alarcón Cot, Eduardo José|||0000-0001-7663-7153
García Almudever, Carmen
Feld, Sebastian
author_role author
author2 le Henaff, Pablo
Ovide González, Anabel
Escofet i Majoral, Pau
Ben Rached, Sahar
Rodrigo Muñoz, Santiago
van Someren, Hans
Abadal Cavallé, Sergi|||0000-0003-0941-0260
Alarcón Cot, Eduardo José|||0000-0001-7663-7153
García Almudever, Carmen
Feld, Sebastian
author2_role author
author
author
author
author
author
author
author
author
author
dc.subject.none.fl_str_mv Quantum circuit mapping
Multi-core quantum computers
Modular architectures
Quantum communication
Interaction graphs
Quantum benchmarks
Gate-dependency graphs
Àrees temàtiques de la UPC::Informàtica
Àrees temàtiques de la UPC::Enginyeria electrònica
topic Quantum circuit mapping
Multi-core quantum computers
Modular architectures
Quantum communication
Interaction graphs
Quantum benchmarks
Gate-dependency graphs
Àrees temàtiques de la UPC::Informàtica
Àrees temàtiques de la UPC::Enginyeria electrònica
description Application-specific quantum computers offer the most efficient means to tackle problems intractable by classical computers. Realizing these architectures necessitates a deep understanding of quantum circuit properties and their relationship to execution outcomes on quantum devices. Our study aims to perform for the first time a rigorous examination of quantum circuits by introducing graph theory-based metrics extracted from their qubit interaction graph and gate dependency graph (GDG) alongside conventional parameters describing the circuit itself. This methodology facilitates a comprehensive analysis and clustering of quantum circuits. Furthermore, it uncovers a connection between parameters rooted in both qubit interaction and GDGs, and the performance metrics for quantum circuit mapping, across a range of established quantum device and mapping configurations. Among the various device configurations, we particularly emphasize modular (i.e. multi-core) quantum computing architectures due to their high potential as a viable solution for quantum device scalability. This thorough analysis will help us to: i) identify key attributes of quantum circuits that affect the quantum circuit mapping performance metrics; ii) predict the performance on a specific chip for similar circuit structures; iii) determine preferable combinations of mapping techniques and hardware setups for specific circuits; and iv) define representative benchmark sets by clustering similarly structured circuits.
publishDate 2025
dc.date.none.fl_str_mv 2025
2025-01-01
2025
2025-06-17
dc.type.none.fl_str_mv journal article
http://purl.org/coar/resource_type/c_6501
VoR
http://purl.org/coar/version/c_970fb48d4fbd8a85
dc.type.openaire.fl_str_mv info:eu-repo/semantics/article
format article
dc.identifier.none.fl_str_mv https://hdl.handle.net/2117/431867
https://dx.doi.org/10.1088/2058-9565/ada180
url https://hdl.handle.net/2117/431867
https://dx.doi.org/10.1088/2058-9565/ada180
dc.language.none.fl_str_mv Inglés
eng
language_invalid_str_mv Inglés
language eng
dc.rights.none.fl_str_mv open access
http://purl.org/coar/access_right/c_abf2
Attribution 4.0 International
http://creativecommons.org/licenses/by/4.0/
dc.rights.openaire.fl_str_mv info:eu-repo/semantics/openAccess
rights_invalid_str_mv open access
http://purl.org/coar/access_right/c_abf2
Attribution 4.0 International
http://creativecommons.org/licenses/by/4.0/
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv Institute of Physics (IOP)
publisher.none.fl_str_mv Institute of Physics (IOP)
dc.source.none.fl_str_mv reponame:UPCommons. Portal del coneixement obert de la UPC
instname:Universitat Politècnica de Catalunya (UPC)
instname_str Universitat Politècnica de Catalunya (UPC)
reponame_str UPCommons. Portal del coneixement obert de la UPC
collection UPCommons. Portal del coneixement obert de la UPC
repository.name.fl_str_mv
repository.mail.fl_str_mv
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