The velox transactional memory stack
The transactional memory programming paradigm could become the coordination methodology of choice for actual and future multicore and many-core architectures. The transactional memory support spans a complete software and hardware stack, including programming language and hardware support, runtime a...
| Autores: | , , , , , , , , , , , , , , , , , , , , , , , |
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| Tipo de recurso: | artículo |
| Fecha de publicación: | 2010 |
| País: | España |
| Institución: | Universitat Politècnica de Catalunya (UPC) |
| Repositorio: | UPCommons. Portal del coneixement obert de la UPC |
| Idioma: | inglés |
| OAI Identifier: | oai:upcommons.upc.edu:2117/10906 |
| Acceso en línea: | https://hdl.handle.net/2117/10906 https://dx.doi.org/10.1109/MM.2010.80 |
| Access Level: | acceso abierto |
| Palabra clave: | Computer architecture Parallel programming (Computer science) Concurrent programming Velox transactional memory stack Arquitectura de computadors Programació paral·lela (Informàtica) Multiprocessadors Àrees temàtiques de la UPC::Informàtica::Arquitectura de computadors::Arquitectures paral·leles |
| Sumario: | The transactional memory programming paradigm could become the coordination methodology of choice for actual and future multicore and many-core architectures. The transactional memory support spans a complete software and hardware stack, including programming language and hardware support, runtime and libraries, compilers, and application environments. The VELOX project has developed such a comprehensive transactional memory stack. |
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