FPGA based Radar acquisition and preprocessing unit
In this dissertation, a study and a practical implementation of an acquisition and preprocessing unit are provided for the digitization and suitability of the radar signals. The hardware solution allows the digitization of radar signals at an appropriate speed and subsequently transfers the preproce...
| Autor: | |
|---|---|
| Tipo de recurso: | tesis de maestría |
| Fecha de publicación: | 2020 |
| País: | España |
| Institución: | Universitat Politècnica de Catalunya (UPC) |
| Repositorio: | UPCommons. Portal del coneixement obert de la UPC |
| Idioma: | inglés |
| OAI Identifier: | oai:upcommons.upc.edu:2117/329584 |
| Acceso en línea: | https://hdl.handle.net/2117/329584 |
| Access Level: | acceso embargado |
| Palabra clave: | Synthetic aperture radar Electronic circuits RADAR FPGA EMBEDDED SYSTEMS SIGNAL PROCESSING. Radar d'obertura sintètica Circuits electrònics Àrees temàtiques de la UPC::Enginyeria de la telecomunicació |
| id |
ES_4bd4f3a08b2afe2ca93534c7fe87f88d |
|---|---|
| oai_identifier_str |
oai:upcommons.upc.edu:2117/329584 |
| network_acronym_str |
ES |
| network_name_str |
España |
| repository_id_str |
|
| spelling |
FPGA based Radar acquisition and preprocessing unitFPGA based Radar acquisition and preprocessing unitBlanco Caamaño, RamonSynthetic aperture radarElectronic circuitsRADARFPGAEMBEDDED SYSTEMSSIGNAL PROCESSING.Radar d'obertura sintèticaCircuits electrònicsÀrees temàtiques de la UPC::Enginyeria de la telecomunicacióIn this dissertation, a study and a practical implementation of an acquisition and preprocessing unit are provided for the digitization and suitability of the radar signals. The hardware solution allows the digitization of radar signals at an appropriate speed and subsequently transfers the preprocessed data into a suitable interface. The system must include a memory and a direct connection interface for storage and external communication with a computer, respectively. The final results are obtained by processing the sampled data. This task is performed by a computer with a specific processing software designed by the department. The designed solution must be restrictive in terms of size, weight and portability. A low power hardware is needed in order to feed the unit through external batteries, keeping a suitable performance. From a commercial point of view, a cost effective and high integrated solution is needed.Universitat Politècnica de CatalunyaAguasca Solé, AlbertoBroquetas Ibars, Antoni20202020-07-1520202020-10-0120302030-10-01master thesishttp://purl.org/coar/resource_type/c_bdccNAhttp://purl.org/coar/version/c_be7fb7dd8ff6fe43info:eu-repo/semantics/masterThesisapplication/pdfapplication/ziphttps://hdl.handle.net/2117/329584reponame:UPCommons. Portal del coneixement obert de la UPCinstname:Universitat Politècnica de Catalunya (UPC)Inglésengembargoed accesshttp://purl.org/coar/access_right/c_f1cfinfo:eu-repo/semantics/embargoedAccessoai:upcommons.upc.edu:2117/3295842026-05-27T15:37:01Z |
| dc.title.none.fl_str_mv |
FPGA based Radar acquisition and preprocessing unit FPGA based Radar acquisition and preprocessing unit |
| title |
FPGA based Radar acquisition and preprocessing unit |
| spellingShingle |
FPGA based Radar acquisition and preprocessing unit Blanco Caamaño, Ramon Synthetic aperture radar Electronic circuits RADAR FPGA EMBEDDED SYSTEMS SIGNAL PROCESSING. Radar d'obertura sintètica Circuits electrònics Àrees temàtiques de la UPC::Enginyeria de la telecomunicació |
| title_short |
FPGA based Radar acquisition and preprocessing unit |
| title_full |
FPGA based Radar acquisition and preprocessing unit |
| title_fullStr |
FPGA based Radar acquisition and preprocessing unit |
| title_full_unstemmed |
FPGA based Radar acquisition and preprocessing unit |
| title_sort |
FPGA based Radar acquisition and preprocessing unit |
| dc.creator.none.fl_str_mv |
Blanco Caamaño, Ramon |
| author |
Blanco Caamaño, Ramon |
| author_facet |
Blanco Caamaño, Ramon |
| author_role |
author |
| dc.contributor.none.fl_str_mv |
Aguasca Solé, Alberto Broquetas Ibars, Antoni |
| dc.subject.none.fl_str_mv |
Synthetic aperture radar Electronic circuits RADAR FPGA EMBEDDED SYSTEMS SIGNAL PROCESSING. Radar d'obertura sintètica Circuits electrònics Àrees temàtiques de la UPC::Enginyeria de la telecomunicació |
| topic |
Synthetic aperture radar Electronic circuits RADAR FPGA EMBEDDED SYSTEMS SIGNAL PROCESSING. Radar d'obertura sintètica Circuits electrònics Àrees temàtiques de la UPC::Enginyeria de la telecomunicació |
| description |
In this dissertation, a study and a practical implementation of an acquisition and preprocessing unit are provided for the digitization and suitability of the radar signals. The hardware solution allows the digitization of radar signals at an appropriate speed and subsequently transfers the preprocessed data into a suitable interface. The system must include a memory and a direct connection interface for storage and external communication with a computer, respectively. The final results are obtained by processing the sampled data. This task is performed by a computer with a specific processing software designed by the department. The designed solution must be restrictive in terms of size, weight and portability. A low power hardware is needed in order to feed the unit through external batteries, keeping a suitable performance. From a commercial point of view, a cost effective and high integrated solution is needed. |
| publishDate |
2020 |
| dc.date.none.fl_str_mv |
2020 2020-07-15 2020 2020-10-01 2030 2030-10-01 |
| dc.type.none.fl_str_mv |
master thesis http://purl.org/coar/resource_type/c_bdcc NA http://purl.org/coar/version/c_be7fb7dd8ff6fe43 |
| dc.type.openaire.fl_str_mv |
info:eu-repo/semantics/masterThesis |
| format |
masterThesis |
| dc.identifier.none.fl_str_mv |
https://hdl.handle.net/2117/329584 |
| url |
https://hdl.handle.net/2117/329584 |
| dc.language.none.fl_str_mv |
Inglés eng |
| language_invalid_str_mv |
Inglés |
| language |
eng |
| dc.rights.none.fl_str_mv |
embargoed access http://purl.org/coar/access_right/c_f1cf |
| dc.rights.openaire.fl_str_mv |
info:eu-repo/semantics/embargoedAccess |
| rights_invalid_str_mv |
embargoed access http://purl.org/coar/access_right/c_f1cf |
| eu_rights_str_mv |
embargoedAccess |
| dc.format.none.fl_str_mv |
application/pdf application/zip |
| dc.publisher.none.fl_str_mv |
Universitat Politècnica de Catalunya |
| publisher.none.fl_str_mv |
Universitat Politècnica de Catalunya |
| dc.source.none.fl_str_mv |
reponame:UPCommons. Portal del coneixement obert de la UPC instname:Universitat Politècnica de Catalunya (UPC) |
| instname_str |
Universitat Politècnica de Catalunya (UPC) |
| reponame_str |
UPCommons. Portal del coneixement obert de la UPC |
| collection |
UPCommons. Portal del coneixement obert de la UPC |
| repository.name.fl_str_mv |
|
| repository.mail.fl_str_mv |
|
| _version_ |
1869407587886170112 |
| score |
15,301603 |