Self-modifiable image processing library for model-based design on FPGAs

This paper describes highly configurable hardware modules, included in XIL XSGImgLib library, capable of speed up the hardware implementation of video and image processing systems using the model-based design flow provided by Xilinx System Generator. As part of this work, generic architectures were...

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Detalles Bibliográficos
Autores: Garcés-Socarrás, Luis Manuel, Cabrera Sarmiento, Alejandro J., Sánchez-Solano, Santiago, Brox, Piedad, Ieno, Egidio, Pimenta, Tales Cleber
Tipo de recurso: artículo
Fecha de publicación:2019
País:España
Institución:Consejo Superior de Investigaciones Científicas (CSIC)
Repositorio:DIGITAL.CSIC. Repositorio Institucional del CSIC
OAI Identifier:oai:digital.csic.es:10261/346600
Acceso en línea:http://hdl.handle.net/10261/346600
https://api.elsevier.com/content/abstract/scopus_id/85074985673
Access Level:acceso abierto
Palabra clave:FPGA | MATLAB®/Simulink® | Model-based design flow | Video and Image Processing | XIL XSGImgLib | Xilinx System Generator
Descripción
Sumario:This paper describes highly configurable hardware modules, included in XIL XSGImgLib library, capable of speed up the hardware implementation of video and image processing systems using the model-based design flow provided by Xilinx System Generator. As part of this work, generic architectures were developed to exploit specific characteristics of some processing blocks, which can be self-modified using a novel software procedure developed for MATLAB®. This procedure, along with the generic architecture and the configuration options, allows the abstraction about the specific details of the hardware implementation, as well as the adjustment of the resources consumption of the high-speed image and video processing application for embedded systems with weight, volume and power consumption constrains like smart cameras, video surveillance and autonomous vehicles. The use of this video and image processing library is illustrated by the development of a segmentation application on a Spartan-6 LX45 FPGA although any Xilinx's FPGA is supported.