A bio-inspired hardware implementation of an analog spike-based hippocampus memory model
The need for processing at the edge of the increasing amount of data that is being produced by multitudes of sensors has led to the demand for more power-efficient computational systems, by exploring alternative computing paradigms and technologies. Neuromorphic engineering is a promising approach t...
| Autores: | , , , , |
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| Tipo de recurso: | artículo |
| Estado: | Versión publicada |
| Fecha de publicación: | 2026 |
| País: | España |
| Institución: | Universidad de Sevilla (US) |
| Repositorio: | idUS. Depósito de Investigación de la Universidad de Sevilla |
| OAI Identifier: | oai:idus.us.es:11441/181295 |
| Acceso en línea: | https://hdl.handle.net/11441/181295 https://doi.org/10.1016/j.neucom.2025.131892 |
| Access Level: | acceso abierto |
| Palabra clave: | Hippocampus model Analog sequential memory Spiking neural networks Neuromorphic engineering DYNAP-SE |
| Sumario: | The need for processing at the edge of the increasing amount of data that is being produced by multitudes of sensors has led to the demand for more power-efficient computational systems, by exploring alternative computing paradigms and technologies. Neuromorphic engineering is a promising approach that can address this need by developing electronic systems that faithfully emulate the computational properties of animal brains. In particular, the hippocampus stands out as one of the most relevant brain regions for implementing auto associative memories capable of learning large amounts of information quickly and recalling it efficiently. In this work, we present a computational spike-based memory model inspired by the hippocampus that takes advantage of the features of analog electronic circuits: energy efficiency, compactness, and real-time operation. This model can learn memories, recall them from a partial fragment and forget. It has been implemented as a Spiking Neural Networks directly on a mixed-signal neuromorphic chip. We describe the details of the hardware implementation and demonstrate its operation via a series of benchmark experiments, showing how this research prototype paves the way for the development of future robust and low-power mixed-signal neuromorphic processing systems. |
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