Influence of the amplifier sharing tecnique in pipeline analog-to digital converters (ADCs)
Three 12 bit, 40 MS/s pipelined analog-to-digital-converters (ADCs) are developed in 0.35μm CMOS process with 3.3V single power supply. The proposed ADCs architectures study the influence of the amplifier sharing technique in the power consumption and the main performances in the pipeline ADCs. Simu...
| Autores: | , , |
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| Tipo de recurso: | artículo |
| Fecha de publicación: | 2009 |
| País: | España |
| Institución: | Universidad Politécnica de Cartagena(UPCT) |
| Repositorio: | Repositorio Digital UPCT |
| OAI Identifier: | oai:repositorio.upct.es:10317/873 |
| Acceso en línea: | http://hdl.handle.net/10317/873 |
| Access Level: | acceso abierto |
| Palabra clave: | Convertidores digitales Amplificadores analógicos |
| Sumario: | Three 12 bit, 40 MS/s pipelined analog-to-digital-converters (ADCs) are developed in 0.35μm CMOS process with 3.3V single power supply. The proposed ADCs architectures study the influence of the amplifier sharing technique in the power consumption and the main performances in the pipeline ADCs. Simulations results with extracted netlists are provided and show that the amplifier sharing technique has potential to be used in the reduction of the power consumption. |
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