Comparison of different design alternatives for hardware-in-the-loop of power converters

This paper aims to compare different design alternatives of hardware-in-the-loop (HIL) for emulating power converters in Field Programmable Gate Arrays (FPGAs). It proposes various numerical formats (fixed and floating-point) and different approaches (pure VHSIC Hardware Description Language (VHDL),...

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Autores: Zamiri Mamooliraftar, Elyas, Sánchez González, Alberto, Yushkova, Marina, Martínez García, María Sofía, Castro Martín, Ángel de
Tipo de recurso: artículo
Fecha de publicación:2021
País:España
Institución:Universidad Autónoma de Madrid
Repositorio:Biblos-e Archivo. Repositorio Institucional de la UAM
Idioma:inglés
OAI Identifier:oai:repositorio.uam.es:10486/698770
Acceso en línea:http://hdl.handle.net/10486/698770
https://dx.doi.org/10.3390/electronics10080926
Access Level:acceso abierto
Palabra clave:Digital circuits
Emulation
Field programmable gate arrays
High-level synthesis
Power electronics
Real time systems
Electrónica
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spelling Comparison of different design alternatives for hardware-in-the-loop of power convertersZamiri Mamooliraftar, ElyasSánchez González, AlbertoYushkova, MarinaMartínez García, María SofíaCastro Martín, Ángel deDigital circuitsEmulationField programmable gate arraysHigh-level synthesisPower electronicsReal time systemsElectrónicaThis paper aims to compare different design alternatives of hardware-in-the-loop (HIL) for emulating power converters in Field Programmable Gate Arrays (FPGAs). It proposes various numerical formats (fixed and floating-point) and different approaches (pure VHSIC Hardware Description Language (VHDL), Intellectual Properties (IPs), automated MATLAB HDL code, and High-Level Synthesis (HLS)) to design power converters. Although the proposed models are simple power electronics HIL systems, the idea can be extended to any HIL system. This study compares the design effort of different coding methods and numerical formats considering possible synthesis tools (Precision and Vivado), and it comprises an analytical discussion in terms of area and speed. The different models are synthesized as ad-hoc modules in general-purpose FPGAs, but also using the NI myRIO device as an example of a commercial tool capable of implementing HIL models. The comparison confirms that the optimum design alternative must be chosen based on the application (complexity, frequency, etc.) and designers’ constraints, such as available area, coding expertise, and design effortMDPIDepartamento de Tecnología Electrónica y de las ComunicacionesEscuela Politécnica Superior20212021-04-13research articlehttp://purl.org/coar/resource_type/c_2df8fbb1VoRhttp://purl.org/coar/version/c_970fb48d4fbd8a85info:eu-repo/semantics/articleapplication/pdfhttp://hdl.handle.net/10486/698770https://dx.doi.org/10.3390/electronics10080926reponame:Biblos-e Archivo. Repositorio Institucional de la UAMinstname:Universidad Autónoma de MadridInglésengopen accesshttp://purl.org/coar/access_right/c_abf2info:eu-repo/semantics/openAccessoai:repositorio.uam.es:10486/6987702026-06-23T12:46:27Z
dc.title.none.fl_str_mv Comparison of different design alternatives for hardware-in-the-loop of power converters
title Comparison of different design alternatives for hardware-in-the-loop of power converters
spellingShingle Comparison of different design alternatives for hardware-in-the-loop of power converters
Zamiri Mamooliraftar, Elyas
Digital circuits
Emulation
Field programmable gate arrays
High-level synthesis
Power electronics
Real time systems
Electrónica
title_short Comparison of different design alternatives for hardware-in-the-loop of power converters
title_full Comparison of different design alternatives for hardware-in-the-loop of power converters
title_fullStr Comparison of different design alternatives for hardware-in-the-loop of power converters
title_full_unstemmed Comparison of different design alternatives for hardware-in-the-loop of power converters
title_sort Comparison of different design alternatives for hardware-in-the-loop of power converters
dc.creator.none.fl_str_mv Zamiri Mamooliraftar, Elyas
Sánchez González, Alberto
Yushkova, Marina
Martínez García, María Sofía
Castro Martín, Ángel de
author Zamiri Mamooliraftar, Elyas
author_facet Zamiri Mamooliraftar, Elyas
Sánchez González, Alberto
Yushkova, Marina
Martínez García, María Sofía
Castro Martín, Ángel de
author_role author
author2 Sánchez González, Alberto
Yushkova, Marina
Martínez García, María Sofía
Castro Martín, Ángel de
author2_role author
author
author
author
dc.contributor.none.fl_str_mv Departamento de Tecnología Electrónica y de las Comunicaciones
Escuela Politécnica Superior
dc.subject.none.fl_str_mv Digital circuits
Emulation
Field programmable gate arrays
High-level synthesis
Power electronics
Real time systems
Electrónica
topic Digital circuits
Emulation
Field programmable gate arrays
High-level synthesis
Power electronics
Real time systems
Electrónica
description This paper aims to compare different design alternatives of hardware-in-the-loop (HIL) for emulating power converters in Field Programmable Gate Arrays (FPGAs). It proposes various numerical formats (fixed and floating-point) and different approaches (pure VHSIC Hardware Description Language (VHDL), Intellectual Properties (IPs), automated MATLAB HDL code, and High-Level Synthesis (HLS)) to design power converters. Although the proposed models are simple power electronics HIL systems, the idea can be extended to any HIL system. This study compares the design effort of different coding methods and numerical formats considering possible synthesis tools (Precision and Vivado), and it comprises an analytical discussion in terms of area and speed. The different models are synthesized as ad-hoc modules in general-purpose FPGAs, but also using the NI myRIO device as an example of a commercial tool capable of implementing HIL models. The comparison confirms that the optimum design alternative must be chosen based on the application (complexity, frequency, etc.) and designers’ constraints, such as available area, coding expertise, and design effort
publishDate 2021
dc.date.none.fl_str_mv 2021
2021-04-13
dc.type.none.fl_str_mv research article
http://purl.org/coar/resource_type/c_2df8fbb1
VoR
http://purl.org/coar/version/c_970fb48d4fbd8a85
dc.type.openaire.fl_str_mv info:eu-repo/semantics/article
format article
dc.identifier.none.fl_str_mv http://hdl.handle.net/10486/698770
https://dx.doi.org/10.3390/electronics10080926
url http://hdl.handle.net/10486/698770
https://dx.doi.org/10.3390/electronics10080926
dc.language.none.fl_str_mv Inglés
eng
language_invalid_str_mv Inglés
language eng
dc.rights.none.fl_str_mv open access
http://purl.org/coar/access_right/c_abf2
dc.rights.openaire.fl_str_mv info:eu-repo/semantics/openAccess
rights_invalid_str_mv open access
http://purl.org/coar/access_right/c_abf2
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
dc.publisher.none.fl_str_mv MDPI
publisher.none.fl_str_mv MDPI
dc.source.none.fl_str_mv reponame:Biblos-e Archivo. Repositorio Institucional de la UAM
instname:Universidad Autónoma de Madrid
instname_str Universidad Autónoma de Madrid
reponame_str Biblos-e Archivo. Repositorio Institucional de la UAM
collection Biblos-e Archivo. Repositorio Institucional de la UAM
repository.name.fl_str_mv
repository.mail.fl_str_mv
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