CEPRAM: Compression for Endurance in PCM RAM

We deal with the endurance problem of Phase Change Memories (PCM) by proposing Compression for Endurance in PCM RAM (CEPRAM), a technique to elongate the lifespan of PCM-based main memory through compression. We introduce a total of three compression schemes based on already existent schemes, but ta...

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Detalhes bibliográficos
Autores: González Alberquilla, Rodrigo, Castro Rodríguez, Fernando, Piñuel Moreno, Luis, Tirado Fernández, José Francisco
Formato: artículo
Fecha de publicación:2017
País:España
Recursos:Universidad Complutense de Madrid (UCM)
Repositorio:Docta Complutense
Idioma:inglés
OAI Identifier:oai:docta.ucm.es:20.500.14352/18143
Acesso em linha:https://hdl.handle.net/20.500.14352/18143
Access Level:acceso abierto
Palavra-chave:004
Phase change memory
Main memory
Cache capacity
Technology.
Informática (Informática)
Programación de ordenadores (Informática)
1203.17 Informática
1203.23 Lenguajes de Programación
Descrição
Resumo:We deal with the endurance problem of Phase Change Memories (PCM) by proposing Compression for Endurance in PCM RAM (CEPRAM), a technique to elongate the lifespan of PCM-based main memory through compression. We introduce a total of three compression schemes based on already existent schemes, but targeting compression for PCM-based systems. We do a two-level evaluation. First, we quantify the performance of the compression, in terms of compressed size, bit-flips and how they are affected by errors. Next, we simulate these parameters in a statistical simulator to study how they affect the endurance of the system. Our simulation results reveal that our technique, which is built on top of Error Correcting Pointers (ECP) but using a high-performance cache-oriented compression algorithm modified to better suit our purpose, manages to further extend the lifetime of the memory system. In particular, it guarantees that at least half of the physical pages are in usable condition for 25% longer than ECP, which is slightly more than 5% more than a scheme that can correct 16 failures per block.