FVF-Based Low-Dropout Voltage Regulator with Fast Charging/Discharging Paths for Fast Line and Load Regulation

A new internally compensated low drop-out voltage regulator based on the cascoded flipped voltage follower is presented in this paper. Adaptive biasing current and fast charging/discharging paths have been added to rapidly charge and discharge the parasitic capacitance of the pass transistor gate, t...

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Autores: Hinojo Montero, José María, Luján Martínez, Clara Isabel, Torralba Silgado, Antonio Jesús, Ramírez Angulo, Jaime
Tipo de recurso: artículo
Estado:Versión publicada
Fecha de publicación:2017
País:España
Institución:Universidad de Sevilla (US)
Repositorio:idUS. Depósito de Investigación de la Universidad de Sevilla
OAI Identifier:oai:idus.us.es:11441/94659
Acceso en línea:https://hdl.handle.net/11441/94659
https://doi.org/10.4218/etrij.17.0116.0766
Access Level:acceso abierto
Palabra clave:Low drop-out (LDO)
Voltage regulator
Flipped voltage follower (FVF)
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spelling FVF-Based Low-Dropout Voltage Regulator with Fast Charging/Discharging Paths for Fast Line and Load RegulationHinojo Montero, José MaríaLuján Martínez, Clara IsabelTorralba Silgado, Antonio JesúsRamírez Angulo, JaimeLow drop-out (LDO)Voltage regulatorFlipped voltage follower (FVF)A new internally compensated low drop-out voltage regulator based on the cascoded flipped voltage follower is presented in this paper. Adaptive biasing current and fast charging/discharging paths have been added to rapidly charge and discharge the parasitic capacitance of the pass transistor gate, thus improving the transient response. The proposed regulator was designed with standard 65-nm CMOS technology. Measurements show load and line regulations of 433.80 μV/mA and 5.61 mV/V, respectively. Furthermore, the output voltage spikes are kept under 76 mV for 0.1 mA to 100 mA load variations and 0.9 V to 1.2 V line variations with rise and fall times of 1 μs. The total current consumption is 17.88 μA (for a 0.9 V supply voltage).Ministerio de Economía y Competitividad TEC2015-71072-C3-3-RConsejería de Economía, Innovación y Ciencia. Junta de Andalucía P12-TIC-1862Electronics and Telecommunications Research Institute (ETRI)Ingeniería ElectrónicaMinisterio de Economía y Competitividad (MINECO). EspañaJunta de Andalucía2017info:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionapplication/pdfapplication/pdfhttps://hdl.handle.net/11441/94659https://doi.org/10.4218/etrij.17.0116.0766reponame:idUS. Depósito de Investigación de la Universidad de Sevillainstname:Universidad de Sevilla (US)InglésETRI Journal, 39 (3), 373-382.TEC2015-71072-C3-3-RP12-TIC-1862https://doi.org/10.4218/etrij.17.0116.0766info:eu-repo/semantics/openAccessoai:idus.us.es:11441/946592026-06-17T12:51:07Z
dc.title.none.fl_str_mv FVF-Based Low-Dropout Voltage Regulator with Fast Charging/Discharging Paths for Fast Line and Load Regulation
title FVF-Based Low-Dropout Voltage Regulator with Fast Charging/Discharging Paths for Fast Line and Load Regulation
spellingShingle FVF-Based Low-Dropout Voltage Regulator with Fast Charging/Discharging Paths for Fast Line and Load Regulation
Hinojo Montero, José María
Low drop-out (LDO)
Voltage regulator
Flipped voltage follower (FVF)
title_short FVF-Based Low-Dropout Voltage Regulator with Fast Charging/Discharging Paths for Fast Line and Load Regulation
title_full FVF-Based Low-Dropout Voltage Regulator with Fast Charging/Discharging Paths for Fast Line and Load Regulation
title_fullStr FVF-Based Low-Dropout Voltage Regulator with Fast Charging/Discharging Paths for Fast Line and Load Regulation
title_full_unstemmed FVF-Based Low-Dropout Voltage Regulator with Fast Charging/Discharging Paths for Fast Line and Load Regulation
title_sort FVF-Based Low-Dropout Voltage Regulator with Fast Charging/Discharging Paths for Fast Line and Load Regulation
dc.creator.none.fl_str_mv Hinojo Montero, José María
Luján Martínez, Clara Isabel
Torralba Silgado, Antonio Jesús
Ramírez Angulo, Jaime
author Hinojo Montero, José María
author_facet Hinojo Montero, José María
Luján Martínez, Clara Isabel
Torralba Silgado, Antonio Jesús
Ramírez Angulo, Jaime
author_role author
author2 Luján Martínez, Clara Isabel
Torralba Silgado, Antonio Jesús
Ramírez Angulo, Jaime
author2_role author
author
author
dc.contributor.none.fl_str_mv Ingeniería Electrónica
Ministerio de Economía y Competitividad (MINECO). España
Junta de Andalucía
dc.subject.none.fl_str_mv Low drop-out (LDO)
Voltage regulator
Flipped voltage follower (FVF)
topic Low drop-out (LDO)
Voltage regulator
Flipped voltage follower (FVF)
description A new internally compensated low drop-out voltage regulator based on the cascoded flipped voltage follower is presented in this paper. Adaptive biasing current and fast charging/discharging paths have been added to rapidly charge and discharge the parasitic capacitance of the pass transistor gate, thus improving the transient response. The proposed regulator was designed with standard 65-nm CMOS technology. Measurements show load and line regulations of 433.80 μV/mA and 5.61 mV/V, respectively. Furthermore, the output voltage spikes are kept under 76 mV for 0.1 mA to 100 mA load variations and 0.9 V to 1.2 V line variations with rise and fall times of 1 μs. The total current consumption is 17.88 μA (for a 0.9 V supply voltage).
publishDate 2017
dc.date.none.fl_str_mv 2017
dc.type.none.fl_str_mv info:eu-repo/semantics/article
info:eu-repo/semantics/publishedVersion
format article
status_str publishedVersion
dc.identifier.none.fl_str_mv https://hdl.handle.net/11441/94659
https://doi.org/10.4218/etrij.17.0116.0766
url https://hdl.handle.net/11441/94659
https://doi.org/10.4218/etrij.17.0116.0766
dc.language.none.fl_str_mv Inglés
language_invalid_str_mv Inglés
dc.relation.none.fl_str_mv ETRI Journal, 39 (3), 373-382.
TEC2015-71072-C3-3-R
P12-TIC-1862
https://doi.org/10.4218/etrij.17.0116.0766
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.format.none.fl_str_mv application/pdf
application/pdf
dc.publisher.none.fl_str_mv Electronics and Telecommunications Research Institute (ETRI)
publisher.none.fl_str_mv Electronics and Telecommunications Research Institute (ETRI)
dc.source.none.fl_str_mv reponame:idUS. Depósito de Investigación de la Universidad de Sevilla
instname:Universidad de Sevilla (US)
instname_str Universidad de Sevilla (US)
reponame_str idUS. Depósito de Investigación de la Universidad de Sevilla
collection idUS. Depósito de Investigación de la Universidad de Sevilla
repository.name.fl_str_mv
repository.mail.fl_str_mv
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score 15,300724

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