Optimization of Memristors for Information Storage and Neuromorphic Computing
[eng] The total amount of global information to be stored and computed is increasing exponentially since the beginning of the 21st century. The semiconductor industry made great efforts to push the silicon-based integrated circuits (ICs) to follow Moore’s Law to achieve better performance and meet t...
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| Tipo de recurso: | tesis doctoral |
| Estado: | Versión publicada |
| Fecha de publicación: | 2023 |
| País: | España |
| Institución: | Universidad de Barcelona |
| Repositorio: | Dipòsit Digital de la UB |
| OAI Identifier: | oai:diposit.ub.edu:2445/193137 |
| Acceso en línea: | https://hdl.handle.net/2445/193137 http://hdl.handle.net/10803/687583 |
| Access Level: | acceso abierto |
| Palabra clave: | Semiconductors Transistors Circuits integrats Nanoelectrònica Integrated circuits Nanoelectronics |
| Sumario: | [eng] The total amount of global information to be stored and computed is increasing exponentially since the beginning of the 21st century. The semiconductor industry made great efforts to push the silicon-based integrated circuits (ICs) to follow Moore’s Law to achieve better performance and meet the requirements. However, the basic element of the modern ICs, the transistor, is approaching its physical limitation of further scaling down. Current leakage in the vertical direction across the dielectrics and the crosstalk in the horizontal direction and heat between adjacent devices are unavoidable for smaller devices with thinner dielectrics and higher device density. There are two main solutions are proposed to solve these problems. One is “More than Moore” by replacing the transistor with a new electronic device, for example, a memristor. The other one is “More Moore” by introducing two-dimensional (2D) materials into the transistor structure. Compared to transistors, memristors are competitive with simpler device structure, scalability, and three-dimensional stackability. 2D materials have been included in the technology progression plan in the International Roadmap for Device and Systems (IRDS). In this PhD thesis, I combined the advantages of both memristor and 2D materials and carried out a deep study on 2D materials-based memristors, especially using a 2D insulator hexagonal boron nitride (h-BN) as the resistive switching medium. I fabricated h-BN based memristors with van der Waals structure and demonstrated that the device has the capability of stable and highly controllable tristate operation by controlling the current compliance (CC) and reset voltage (VRESET). I integrated the h-BN based memristor with a commercial complementary metal-oxide-semiconductor (CMOS) circuit, and h-BN memristors with a size of 0.053 µm2 have been achieved. The formed one transistor one memristor (1T1M) cell can show high endurance (millions of cycles with every measurement points recorded), multistate switching, coexistence of volatile and non-volatile switching, and synaptic behaviour like spike-time-dependent-plasticity (STDP), which are useful for implementing a spiking neural network (SNN). The circuit based on two 1T1M cells can also show matrix operations like OR and IMP logic. I also wrote a perspective paper about proposing a roadmap for the future development of integrated circuits based on 2D layered materials. Apart from the 2D materials- based memristor, I also conducted several experiments based on the metal-oxide memristor and liquid phase exfoliated 2D materials for comparison. Our study is an important step toward the 2D materials-based memristor with wafer- scalable fabrication methods, and its successful integration into silicon-based ICs could inspire other scientists to study 2D materials-based devices integrated into a real microchip with functional circuitry. |
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