Low power CMOS vision sensor for foreground segmentation
This thesis focuses on the design of a top-ranked algorithm for background subtraction, the Pixel Adaptive Based Segmenter (PBAS), for its mapping onto a CMOS vision sensor on the focal plane processing. The redesign of PBAS into its hardware oriented version, HO-PBAS, has led to a less number of me...
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| Tipo de recurso: | tesis doctoral |
| Fecha de publicación: | 2021 |
| País: | España |
| Institución: | Universidad de Santiago de Compostela (USC) |
| Repositorio: | Minerva. Repositorio Institucional de la Universidad de Santiago de Compostela |
| Idioma: | inglés |
| OAI Identifier: | oai:minerva.usc.gal:10347/26472 |
| Acceso en línea: | http://hdl.handle.net/10347/26472 |
| Access Level: | acceso abierto |
| Palabra clave: | Materias::Investigación::33 Ciencias tecnológicas::3307 Tecnología electrónica::330793 Microelectrónica. Diseño Materias::Investigación::33 Ciencias tecnológicas::3307 Tecnología electrónica::330703 Diseño de circuitos Materias::Investigación::33 Ciencias tecnológicas::3304 Tecnología de los ordenadores::330401 Ordenadores analógicos |
| Sumario: | This thesis focuses on the design of a top-ranked algorithm for background subtraction, the Pixel Adaptive Based Segmenter (PBAS), for its mapping onto a CMOS vision sensor on the focal plane processing. The redesign of PBAS into its hardware oriented version, HO-PBAS, has led to a less number of memories per pixel, along with a simpler overall model, yet, resulting in an acceptable loss of accuracy with respect to its counterpart on CPU. This thesis features two CMOS vision sensors. The first one, HOPBAS1K, has laid out a 24 x 56 pixel array onto a miniasic chip in standard 180 nm CMOS technology. The second one, HOPBAS10K, features an array of 98 x 98 pixels in standard 180 nm CMOS technology too. The second chip fixes some issues found in the first chip, and provides good hardware and background performance metrics. |
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