Monitor amb control strategies to reduce the impact of process variations in digital circuits

As CMOS technology scales down, Process, Voltage, Temperature and Ageing (PVTA) variations have an increasing impact on the performance and power consumption of electronic devices. These issues may hold back the continuous improvement of these devices in the near future. There are several ways to fa...

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Detalles Bibliográficos
Autor: Mauricio Ferré, Joan
Tipo de recurso: tesis doctoral
Fecha de publicación:2015
País:España
Institución:Universitat Politècnica de Catalunya (UPC)
Repositorio:UPCommons. Portal del coneixement obert de la UPC
Idioma:inglés
OAI Identifier:oai:upcommons.upc.edu:2117/96042
Acceso en línea:https://hdl.handle.net/2117/96042
https://dx.doi.org/10.5821/dissertation-2117-96042
Access Level:acceso abierto
Palabra clave:Electrònica digital
Metall-òxid-semiconductors complementaris
Àrees temàtiques de la UPC::Enginyeria electrònica
Descripción
Sumario:As CMOS technology scales down, Process, Voltage, Temperature and Ageing (PVTA) variations have an increasing impact on the performance and power consumption of electronic devices. These issues may hold back the continuous improvement of these devices in the near future. There are several ways to face the variability problem: to increase the operating margins of maximum clock frequency, the implementation of lithographic friendly layout styles, and the last one and the focus of this thesis, to adapt the circuit to its actual manufacturing and environment conditions by tuning some of the adjustable parameters once the circuit has been manufactured. The main challenge of this thesis is to develop a low-area variability compensation mechanism to automatically mitigate PVTA variations in run-time, i.e. while integrated circuit is running. This implies the development of a sensor to obtain the most accurate picture of variability, and the implementation of a control block to knob some of the electrical parameters of the circuit.