Development of high voltage-CMOS sensors within the CERN-RD50 collaboration
This paper presents work done by the CERN-RD50 collaboration to develop and study monolithic CMOS sensors for future hadron colliders, especially in terms of radiation tolerance, time resolution and granularity. Currently CERN-RD50 is completing the performance evaluation of RD50-MPW2 and has recent...
| Autores: | , , , , |
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| Tipo de recurso: | artículo |
| Estado: | Versión publicada |
| Fecha de publicación: | 2022 |
| País: | España |
| Institución: | Varias* (Consorci de Biblioteques Universitáries de Catalunya, Centre de Serveis Científics i Acadèmics de Catalunya) |
| Repositorio: | Recercat. Dipósit de la Recerca de Catalunya |
| OAI Identifier: | oai:recercat.cat:2445/189147 |
| Acceso en línea: | https://hdl.handle.net/2445/189147 |
| Access Level: | acceso abierto |
| Palabra clave: | Detectors Hadrons Metall-òxid-semiconductors complementaris Complementary metal oxide semiconductors |
| Sumario: | This paper presents work done by the CERN-RD50 collaboration to develop and study monolithic CMOS sensors for future hadron colliders, especially in terms of radiation tolerance, time resolution and granularity. Currently CERN-RD50 is completing the performance evaluation of RD50-MPW2 and has recently submitted RD50-MPW3, the second and third prototype sensor chips designed by the collaboration. The paper gives an overview of the main design aspects and performance evaluation results of the first two prototype chips RD50-MPW1 and RD50-MPW2, and details the design of the latest prototype RD50-MPW3. RD50-MPW2 is a small prototype with an 8 x 8 matrix of active pixels which implement analogue readout electronics only and solutions for low leakage currents. This prototype has been evaluated in the laboratory and also at proton and ion beam facilities, before and after irradiation with neutrons up to 21015 /cm 2. RD50-MPW3 is a more advanced prototype with a matrix of 64 x 64 pixels which integrate both analogue and digital readout electronics inside the sensing diodes. To alleviate routing congestion and minimise crosstalk noise, the pixels are serially configured and organised in a double column scheme. This prototype has optimised peripheral readout electronics for effective chip configuration, based on the I2C protocol, and fast data transmission. |
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