SMASH Delta-Sigma Modulator with Adderless Feed-forward Loop Filter

A novel cascade modulator, which combines the benefits of SMASH topology and feed-forward loop filter, is presented in this letter. The proposed architecture is based on moving the powerhungry adder block from the quantizer input to the first integrator output. The proposed architecture shows a bett...

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Detalles Bibliográficos
Autores: Honarparvar, M., Rosa, José M. de la, Nabki, F., Sawan, M.
Tipo de recurso: otro
Estado:Versión aceptada para publicación
Fecha de publicación:2017
País:España
Institución:Consejo Superior de Investigaciones Científicas (CSIC)
Repositorio:DIGITAL.CSIC. Repositorio Institucional del CSIC
OAI Identifier:oai:digital.csic.es:10261/157552
Acceso en línea:http://hdl.handle.net/10261/157552
Access Level:acceso abierto
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repository_id_str
spelling SMASH Delta-Sigma Modulator with Adderless Feed-forward Loop FilterHonarparvar, M.Rosa, José M. de laNabki, F.Sawan, M.A novel cascade modulator, which combines the benefits of SMASH topology and feed-forward loop filter, is presented in this letter. The proposed architecture is based on moving the powerhungry adder block from the quantizer input to the first integrator output. The proposed architecture shows a better OTA linearity and relaxed OTA DC-gain compared to conventional MASH and SMASH topologies. This feature makes the modulator topology more suitable than conventional MASH and SMASH topologies for low-voltage applications.Peer ReviewedInstitution of Electrical EngineersConsejo Superior de Investigaciones Científicas [https://ror.org/02gfc7t72]2017201720172017info:eu-repo/semantics/otherhttp://purl.org/coar/resource_type/c_2f33Postprintinfo:eu-repo/semantics/acceptedVersioninfo:eu-repo/semantics/bookhttp://hdl.handle.net/10261/157552reponame:DIGITAL.CSIC. Repositorio Institucional del CSICinstname:Consejo Superior de Investigaciones Científicas (CSIC)InglésSíinfo:eu-repo/semantics/openAccessoai:digital.csic.es:10261/1575522026-05-22T06:33:51Z
dc.title.none.fl_str_mv SMASH Delta-Sigma Modulator with Adderless Feed-forward Loop Filter
title SMASH Delta-Sigma Modulator with Adderless Feed-forward Loop Filter
spellingShingle SMASH Delta-Sigma Modulator with Adderless Feed-forward Loop Filter
Honarparvar, M.
title_short SMASH Delta-Sigma Modulator with Adderless Feed-forward Loop Filter
title_full SMASH Delta-Sigma Modulator with Adderless Feed-forward Loop Filter
title_fullStr SMASH Delta-Sigma Modulator with Adderless Feed-forward Loop Filter
title_full_unstemmed SMASH Delta-Sigma Modulator with Adderless Feed-forward Loop Filter
title_sort SMASH Delta-Sigma Modulator with Adderless Feed-forward Loop Filter
dc.creator.none.fl_str_mv Honarparvar, M.
Rosa, José M. de la
Nabki, F.
Sawan, M.
author Honarparvar, M.
author_facet Honarparvar, M.
Rosa, José M. de la
Nabki, F.
Sawan, M.
author_role author
author2 Rosa, José M. de la
Nabki, F.
Sawan, M.
author2_role author
author
author
dc.contributor.none.fl_str_mv Consejo Superior de Investigaciones Científicas [https://ror.org/02gfc7t72]
description A novel cascade modulator, which combines the benefits of SMASH topology and feed-forward loop filter, is presented in this letter. The proposed architecture is based on moving the powerhungry adder block from the quantizer input to the first integrator output. The proposed architecture shows a better OTA linearity and relaxed OTA DC-gain compared to conventional MASH and SMASH topologies. This feature makes the modulator topology more suitable than conventional MASH and SMASH topologies for low-voltage applications.
publishDate 2017
dc.date.none.fl_str_mv 2017
2017
2017
2017
dc.type.none.fl_str_mv info:eu-repo/semantics/other
http://purl.org/coar/resource_type/c_2f33
Postprint
info:eu-repo/semantics/acceptedVersion
dc.type.openaire.fl_str_mv info:eu-repo/semantics/book
format other
status_str acceptedVersion
dc.identifier.none.fl_str_mv http://hdl.handle.net/10261/157552
url http://hdl.handle.net/10261/157552
dc.language.none.fl_str_mv Inglés
language_invalid_str_mv Inglés
dc.relation.none.fl_str_mv Sí
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
eu_rights_str_mv openAccess
dc.publisher.none.fl_str_mv Institution of Electrical Engineers
publisher.none.fl_str_mv Institution of Electrical Engineers
dc.source.none.fl_str_mv reponame:DIGITAL.CSIC. Repositorio Institucional del CSIC
instname:Consejo Superior de Investigaciones Científicas (CSIC)
instname_str Consejo Superior de Investigaciones Científicas (CSIC)
reponame_str DIGITAL.CSIC. Repositorio Institucional del CSIC
collection DIGITAL.CSIC. Repositorio Institucional del CSIC
repository.name.fl_str_mv
repository.mail.fl_str_mv
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score 15,811543

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