Estratégias de teste aplicadas à rede de interconexão de FPGAS

This work aims to carry out an analysis of the main existing testing strategies for FPGA, and propose a new strategy applied to the interconnection network of the Xilinx Spartan 3E FPGA based on linear feedback shift register synthesized by Berlekamp Massey Algorithm that can accurately localize the...

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Detalles Bibliográficos
Autor: Pereira, Igor Gadelha
Tipo de recurso: tesis de maestría
Estado:Versión publicada
Fecha de publicación:2014
País:Brasil
Institución:Universidade Federal da Paraíba (UFPB)
Repositorio:Biblioteca Digital de Teses e Dissertações da UFPB
Idioma:portugués
OAI Identifier:oai:repositorio.ufpb.br:tede/5296
Acceso en línea:https://repositorio.ufpb.br/jspui/handle/tede/5296
Access Level:acceso abierto
Palabra clave:Teste de FPGAs
Estratégias de teste BIST
Teste da rede de interconexão
Test of FPGAs
FPGAs Bist Strategys
Interconnection network test
ENGENHARIAS::ENGENHARIA ELETRICA
Descripción
Sumario:This work aims to carry out an analysis of the main existing testing strategies for FPGA, and propose a new strategy applied to the interconnection network of the Xilinx Spartan 3E FPGA based on linear feedback shift register synthesized by Berlekamp Massey Algorithm that can accurately localize the failure. For this, we used softwares from Xilinx manufacturer (specifically, XDL and FPGA_editor) to determine the FPGA based configuration and than create a new proposal and evaluate their employability. As a result of the proposed strategy, it was possible to route 7 WUTs (Wires Under Test) of total of 8 for the FPGA under investigation. Thus, it was necessary 24 test configurations to test and locate the failure on all hexlines and doublelines. The results show that this strategy is able to test 7 WUTs at a time and needs 24 test configurations to test and diagnose precisely the failure location.