Design of Low Noise Readout Amplifiers for Monolithic Capacitive CMOS-MEMS Accelerometers
[ANGLÈS] This thesis report describes the design process, the implementation and the simulation and measurement results of two different readout circuits to be used with two monolithic MEMS accelerometers fabricated by post-CMOS surface micromachining based on isotropic wet etching in IHP SiGe 0,25...
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| Tipo de documento: | dissertação |
| Data de publicação: | 2014 |
| País: | España |
| Recursos: | Universitat Politècnica de Catalunya (UPC) |
| Repositório: | UPCommons. Portal del coneixement obert de la UPC |
| Idioma: | inglês |
| OAI Identifier: | oai:upcommons.upc.edu:2099.1/22654 |
| Acesso em linha: | https://hdl.handle.net/2099.1/22654 |
| Access Level: | Acceso aberto |
| Palavra-chave: | Accelerometers Microelectromechanical systems MEMS Readout Circuit Low noise Low Power Acceleròmetres Sistemes microelectromecànics Àrees temàtiques de la UPC::Enginyeria electrònica::Microelectrònica |
| Resumo: | [ANGLÈS] This thesis report describes the design process, the implementation and the simulation and measurement results of two different readout circuits to be used with two monolithic MEMS accelerometers fabricated by post-CMOS surface micromachining based on isotropic wet etching in IHP SiGe 0,25 μm technology. The first design is used with a 50 fF z-axis sensor and the second design with a 200 fF sensor as well as the first sensor. The approach used has been the Continuous Time Voltage (CTV) sensing implemented in two ways. The first readout circuit implements a CTV sensing utilising an open-loop topology whereas the second design implements a CTV sensing with a closed-loop amplifier and low duty-cycle reset. In both designs, chopper stabilisation has been implemented to get rid of DC offset and Flicker noise, making both designs to work beyond the noise corner frequency to obtain the lowest achievable noise floor: thermal noise. The target during the design of both circuits has been to design amplifying circuits with a thermal noise equal or below the Brownian-noise of the capacitive sensor in order to make the noise from the sensor to be dominant. This has been possible by means of a deep study of noise and the optimisation of the transistor dimensions ratio that have the highest noise influence: input pair transistors. In both cases, equations that relate input node capacitance with noise have been found and final values have been obtained by fine tuning using the design software following the hypothesis found in the derived equations. The first design has been fabricated and total noise using opamp measured noise shows a noise floor of 238μg/rt-Hz, a lower noise value than designs with sensors having a similar sensitivity found in the literature. Second design has not been fabricated yet, but simulations also show a good noise performance of 20μg/rt-Hz with the second sensor. However, differences in measured and simulated noise in the first design shows that the total noise of the second design using the second sensor may be lower than the simulated value due to a rather pessimistic noise model used by the software. |
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