Cita APA

Imaña Pascual, J. L. (2021). Low-delay FPGA-based implementation of finite field multipliers.

Citación estilo Chicago

Imaña Pascual, José Luis. Low-delay FPGA-based Implementation of Finite Field Multipliers. 2021.

Cita MLA

Imaña Pascual, José Luis. Low-delay FPGA-based Implementation of Finite Field Multipliers. 2021.