Cita APA

Liang, X., Canal Corretger, R., & Wei, G. (2008). Replacing 6T SRAMs with 3T1D DRAMs in the L1 data cache to combat process variability.

Citación estilo Chicago

Liang, Xiaoyao, Ramon|||0000-0003-4542-204X Canal Corretger, y Gu-Yeon Wei. Replacing 6T SRAMs With 3T1D DRAMs in the L1 Data Cache to Combat Process Variability. 2008.

Cita MLA

Liang, Xiaoyao, Ramon|||0000-0003-4542-204X Canal Corretger, y Gu-Yeon Wei. Replacing 6T SRAMs With 3T1D DRAMs in the L1 Data Cache to Combat Process Variability. 2008.