Cita APA

Cortadella, J. (2013). Area-optimal transistor folding for 1-D gridded cell design.

Citación estilo Chicago

Cortadella, Jordi|||0000-0001-8114-250X. Area-optimal Transistor Folding for 1-D Gridded Cell Design. 2013.

Cita MLA

Cortadella, Jordi|||0000-0001-8114-250X. Area-optimal Transistor Folding for 1-D Gridded Cell Design. 2013.