A Side-Channel Protected and High-Performance Hardware Implementation for EdDSA25519

This paper presents a high-performance and secure hardware implementation of the Edwards-Curve Digital Signature Algorithm (EdDSA25519). Using the fixed-base signed multi-comb and the k-ary algorithms for scalar multiplication, the proposed design achieves 307%, 253%, and 48% faster performance in k...

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Detalles Bibliográficos
Autores: Navarro Torrero, Pablo, Camacho Ruiz, Eros, Martínez-Rodríguez, Macarena Cristina, Brox, Piedad
Tipo de recurso: artículo
Estado:Versión publicada
Fecha de publicación:2025
País:España
Institución:Consejo Superior de Investigaciones Científicas (CSIC)
Repositorio:DIGITAL.CSIC. Repositorio Institucional del CSIC
OAI Identifier:oai:digital.csic.es:10261/402069
Acceso en línea:http://hdl.handle.net/10261/402069
https://api.elsevier.com/content/abstract/scopus_id/105010050043
Access Level:acceso abierto
Palabra clave:EdDSA25519
Elliptic curve cryptography
Hardware implementation
High-performance
Side-channel attacks
TVLA
Descripción
Sumario:This paper presents a high-performance and secure hardware implementation of the Edwards-Curve Digital Signature Algorithm (EdDSA25519). Using the fixed-base signed multi-comb and the k-ary algorithms for scalar multiplication, the proposed design achieves 307%, 253%, and 48% faster performance in key generation, signature generation, and signature verification, respectively, compared to the fastest previous hardware implementation in the state-of-the-art. When compared to the software-based OpenSSL implementation, our design demonstrates timing performance improvements ranging from 1000% to 2200%. Additionally, we integrate robust Side-Channel Attack (SCA) countermeasures and validate their effectiveness through Test Vector Leakage Assessment (TVLA). The results demonstrate increased resistance to Simple Power Analysis (SPA) and Differential Power Analysis (DPA), offering a hardware-based secure solution for modern cryptographic applications.