Serrano, F., Clemente Barreira, J. A., & Mecha López, H. (2015). A Methodology to Emulate Single Event Upsets in Flip-Flops using FPGAs through Partial Reconfiguration and Instrumentation.
Citação norma ChicagoSerrano, Felipe, Juan Antonio Clemente Barreira, e Hortensia Mecha López. A Methodology to Emulate Single Event Upsets in Flip-Flops Using FPGAs Through Partial Reconfiguration and Instrumentation. 2015.
Citação norma MLASerrano, Felipe, Juan Antonio Clemente Barreira, e Hortensia Mecha López. A Methodology to Emulate Single Event Upsets in Flip-Flops Using FPGAs Through Partial Reconfiguration and Instrumentation. 2015.
Nota: a formatação da citação pode não corresponder 100% ao definido pela respectiva norma.